Advancements in integrated circuit (IC) technology, such as in very-large-scale integration (VLSI), have lead to a tremendous increase in device density and circuit speed. As a result, the high power consumption and power density become important design issues because high power density raises temperature and may cause overheating. High working temperature causes degradation in circuit performance that may lead to incorrect computation; and, in the worst case, it may permanently damage the chip. Therefore, a mechanism that can dynamically change power consumption so as to avoid overheating is very important to improve system reliability and yield. A key to such a mechanism is a reliable means of temperature sensing to detect areas on the chip that are or may be overheating.
In addition, with the building blocks of modern ICs, e.g., metal-oxide semiconductor field effect transistors (MOSFETs), becoming smaller, the number of atoms in the silicon that produce many of the transistors' properties is becoming fewer, with the result that control of dopant numbers and placement is more erratic. During chip manufacturing, random process variations affect the transistors' characteristics including, but not limited to, all transistor dimensions, such as gate length and width, junction depths, oxide thickness, etc. It is, therefore, also advantageous to monitor other on-chip characteristics that can impact IC performance such as variations in the transistors' characteristics resulting from the IC manufacturing process.
The present disclosure is illustrated by way of example and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present disclosure.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein. Also, the functions included in the flow diagrams do not imply a required order of performing the functionality contained therein.